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STRH40P10FSY3
P-channel 100V - 0.060 - TO-254AA Rad-hard low gate charge STripFETTM Power MOSFET
General features
Type STRH40P10FSY3

VDSS 100V
Low RDS(on) Fast switching Single event effect (SEE) hardned Low total gate charge Light weight 100% avalanche tested Application oriented characterization Hermetically sealed Heavy ion SOA 100kRad TID SEL & SEGR with 34Mev/cm/mg LET ions
TO-254AA
1 3 2
Internal schematic diagram
Description
This Power MOSFET series realized with STMicroelectronics unique STripFET process has specifically been designed to sustain high TID and provide immunity to heavy ion effects. It is therefore suitable as power switch in mainly highefficiency DC-DC converters. It is also intended for any application with low gate charge drive requirements.
Application

Satellite High reliability
Order codes
Part number STRH40P10FSY1 STRH40P10FSY3
1. Mil temp range 2. Space flights parts (full ESA flow screening)
(1) (2)
Marking RH40P10FSY1 RH40P10FSY3
Package TO-254AA TO-254AA
Packaging Individual strip pack Individual strip pack
March 2007
Rev 5
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Contents
STRH40P10FSY3
Contents
1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 2.2 2.3 Pre-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Post-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics (curves) ............................. 7
3 4 5
Test circuit
................................................ 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
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STRH40P10FSY3
Electrical ratings
1
Electrical ratings
Table 1.
Symbol VDS VGS ID
(1)
Absolute maximum ratings (pre-irradiation)
Parameter Drain-source voltage (VGS = 0) Gate-source voltage Drain current (continuous) at TC= 25C Drain current (continuous) at TC= 100C Drain current (pulsed) Total dissipation at TC= 25C Value 100 18 40 25 160 176 19.5 -55 to 150 150 Unit V V A A A W V/ns C C
ID (1) IDM (2) PTOT
(1)
dv/dt (3) Peak diode recovery voltage slope Tstg Tj Storage temperature Max. operating junction temperature
1. Rated according to the Rthj-case + Rthc-s 2. Pulse width limited by safe operating area 3. ISD < 40A, di/dt < 1060A/s, VDD = 80%V(BR)DSS
Table 2.
Symbol
Thermal data
Parameter Value 0.5 0.21 48 Unit C/W C/W C/W
Rthj-case Thermal resistance junction-case Rthc-s Case-to-sink
Rthj-amb Thermal resistance junction -amb
Table 3.
Symbol IAR EAS EAR
Avalanche characteristics
Parameter Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) Single pulse avalanche energy (starting Tj=25C, ID=IAR, VDD=50V) Repetitive avalanche Value 20 1310 45 Unit A mJ mJ
Note:
For the P-channel MOSFET actual polarity of voltages and current has to be reversed
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Electrical characteristics
STRH40P10FSY3
2
Electrical characteristics
(TCASE = 25C unless otherwise specified)
2.1
Pre-irradiation
Table 4.
Symbol IDSS IGSS V(BR)DSS VGS(th) RDS(on)
On/off states
Parameter Zero gate voltage drain current (VGS = 0) Gate body leakage current (VDS = 0) Drain-source breakdown voltage Gate threshold voltage Static drain-source on resistance Test conditions 80% BVDss VGS = 18V ID = 250A, VGS = 0V VDS =VGS, ID = 1mA VGS = 12V, ID = 20A 100 2 0.060 4.5 0.067 Min. Typ. Max 10
100
Unit A nA V V
Table 5.
Symbol Ciss Coss Crss Qg Qgs Qgd RG
Dynamic
Parameter Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test conditions VDS = 25V, f=1MHz, VGS=0V VDD = 50V, ID = 20A, VGS=12V f=1MHz Gate DC Bias=0 Test signal level=20mV open drain Min. Typ. 5500 650 260 181 17 41 250 24 57 3 Max Unit pF pF pF nC nC nC
Gate input resistance
1.5
Table 6.
Symbol td(on) tr td(off) tf
Switching times
Parameter Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions Min. Typ. 17 40 165 50 Max Unit ns ns ns ns
VDD = 50V, ID = 20A, RG = 4.7, VGS = 12V
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STRH40P10FSY3
Electrical characteristics
Table 7.
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 40A, VGS = 0 ISD = 40A, di/dt = 100A/s VDD= 45V, Tj = 25C ISD = 40A, di/dt = 100A/s VDD= 45V, Tj = 150C 298 3.45 23 392 5.90 30 Test conditions Min. Typ. Max Unit 40 160 1.1 A A V ns C A ns C A
1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300s, duty cycle 1.5%
2.2
Post-irradiation
The ST Rad-Hard Power MOSFETs are tested to verify the radiation capability. The technology is extremely resistant to assurance well functioning of the device inside the radiation environments. Every manufacturing lot is tested for total ionizing dose. (@Tj=25C up to 100Krad (a)) Table 8.
Symbol IDSS IGSS V(BR)DSS VGS(th) RDS(on)
On/off states
Parameter Test conditions Min. Typ. Max 10
100
Unit A nA V
Zero gate voltage drain current 80% BVDss (VGS = 0) Gate body leakage current (VDS = 0) Drain-source breakdown voltage Gate threshold voltage Static drain-source on resistance VGS = 18V ID = 250A, VGS = 0V VDS =VGS, ID = 1mA VGS = 12V, ID = 20A 100 2
4.5 0.060 0.067
V
a. According to ESCC 22900 specification, Co60 gamma rays, dose rate:0.1rad/sec.
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Electrical characteristics
STRH40P10FSY3
Table 9.
Ion Kr Xe
Single event effect, SOA(1)
Let (Mev/(mg/cm2)) 34 55.9 Energy (MeV) 316 459 Range (m) 43 43 VDS (V) @VGS0V 100 80
1. Rad-Hard Power MOSFETs have been characterized in heavy ion environment for single event effect (SEE). Single event effect characterization is illustrated
Table 10.
Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM
Source drain diode
Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 40A, VGS = 0 ISD = 40A, di/dt = 100A/s VDD= 45V, Tj = 25C ISD = 40A, di/dt = 100A/s VDD= 45V, Tj = 150C 298 3.45 23 392 5.90 30 Test conditions Min. Typ. Max Unit 40 160 1.1 A A V ns C A ns C A
1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300s, duty cycle 1.5%
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STRH40P10FSY3
Electrical characteristics
2.3
Figure 1.
Electrical characteristics (curves)
Safe operating area Figure 2. Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Gate charge vs gate-source voltage Figure 6.
Capacitance variations
7/12
Electrical characteristics Figure 7. Normalized BVDSS vs temperature Figure 8.
STRH40P10FSY3 Static drain-source on resistance
Figure 9.
Normalized gate threshold voltage vs temperature
Figure 10. Normalized on resistance vs temperature
Figure 11. Source drain-diode forward characteristics
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STRH40P10FSY3
Test circuit
3
Test circuit
Figure 12. Switching times test circuit for resistive load (1)
1. Max driver VGS slope = 1V/ns (no DUT)
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Package mechanical data
STRH40P10FSY3
4
Package mechanical data
TO-254AA MECHANICAL DATA
mm. MIN. 13.59 13.59 20.07 6.32 1.02 3.53 16.89 6.86 0.89 3.81 3.81 12.95 3.05 0.71 1.0 1.65 0.065 14.50 0.510 0.120 0.025 0.040 1.14 0.035 0.150 0.150 0.570 TYP MAX. 13.84 13.84 20.32 6.60 1.27 3.78 17.40 MIN. 0.535 0.535 0.790 0.249 0.040 0.139 0.665 0.270 0.045 inch TYP. MAX. 0.545 0.545 0.80 0.260 0.050 0.149 0.685
DIM. A B C D E F G H I J K L M N R1 R2
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STRH40P10FSY3
Revision history
5
Revision history
Table 11.
Date 05-Jul-2006 18-Dec-2006 28-Dec-2006 17-Jan-2007 19-Mar-2007
Revision history
Revision 1 2 3 4 5 First release Figure 1. has been updated Text typo in description Figure 5. has been updated Complete version Changes
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STRH40P10FSY3
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